Logic Gate Astable Multivibrator — How It Works and Example Circuits

The logic gate astable multivibrator is a simple oscillator circuit built using digital logic gates, such as NOT (inverter) gates. By adding a feedback network that comprises a resistor and a capacitor to cascaded inverters, the circuit generates a continuous square-wave output.

In this article, we’ll examine how an inverter-based astable multivibrator operates step by step, derive its frequency expression, and explore example circuits implemented with CMOS devices.

What are the Multivibrators?

Multivibrators are simple groups of electronic circuits or systems that have two states. They can switch between the two states. However, the condition for switching and the function after the switches depend on the type of multivibrators. Here are three of the multivibrator types:

※ Astable Multivibrator
An astable multivibrator has no stable states (“a-“stable). What it means is that, when powered, an astable multivibrator continuously switches between the two states. The constant switching creates an oscillation, where the oscillating frequency is the switching speed.

It’s often used as an oscillator to generate nonsinusoidal signals such as square or triangular waves. For instance, a relaxation oscillator used in vehicle flashing indicators is a type of astable multivibrator.

※ Monostable Multivibrator
A monostable multivibrator only has one stable state (“mono-“stable). When triggered by an external source, it switches from the stable state to the unstable state. It will then maintain the unstable state for a certain period of time before switching back to the stable state.

It’s sometimes used to produce a constant time delay when triggered. It’s also used in a single-pulse generator in the lab or for testing purposes.

※ Bistable Multivibrator
A bistable multivibrator has two fully stable states (“bi-“stable). As a result, if left alone, it will always maintain its latest state. When triggered externally, it switches to and holds on to the other state, unless triggered again.

Also known as a latch or flip-flop, it’s used mainly in sequential logic applications.

How Does an Inverter Gate Astable Multivibrator Work?

In this article, we’re mainly concerned with the astable multivibrator and how to create it using common logic gates (inverter, or NOT gate). That said, let’s look at a typical inverter astable multivibrator with a resistor and capacitor, and try to understand how it works.

The circuit has two inverters (NOT gates) connected in cascade. The resistor is connected from the first inverter’s output (G1) to the capacitor that is itself connected to the second inverter’s output (G2). The node (point A) where the resistor and capacitor join is also fed back to G1’s input.

The circuit output is pulled from the second inverter’s output (G2). The multivibrator should output a square-wave signal with frequency roughly determined by the following formula.

$$f=\frac{1}{2\, \ln(2) \, RC}$$

This form of expression is common in RC-based astable multivibrators. However, it could only provide an approximate value in practical implementations. Still, this gives us insight into how resistance (R) and capacitance (C) affect the output frequency.

Step-By-Step Operation

Figure 2.1: Suppose that the starting condition is G1’s output = “0” and G2’s output = “1.” Because G2’s output has a higher potential, current begins to charge the capacitor negatively and flows across the resistor to get to G1’s output. G2’s output has source current, while G1’s output has sink current. At this moment, a voltage would already have developed across the resistor.

Since G1’s output is “0,” we can assume that its input voltage (A point) is more than the threshold level (A.K.A. trigger point or logic threshold) for “0.” For simplicity’s sake, let’s assume the threshold levels for both logics are about half the supply voltage (VDD). I.e., the gate counts more than half of VDD as “1”, while counts lower than that as “0”.

Therefore, the voltage at point A—and in effect, across the resistor, since G1’s output acts as the ground—is currently more than ½ VDD. The circuit output is from the same node as G2’s output, which is at “1,” or equal to VDD.

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Figure 2.2: As the capacitor is being charged, the charging current begins to drop. As a result, less current flows over the resistor, causing the voltage at point A to fall below the threshold level, or less than half the supply voltage, which causes G1 to switch its output logic from “0” to “1.”

Because it’s second in the logic chain, G2 also switches its output logic from “1” to “0.” This is effectively the inverse of the starting condition. In addition, the change in current direction also causes the capacitor to switch the polarity of its charge later.

The voltage across the resistor can briefly go negative as the switch happens. However, the chip protection should prevent G1’s input from going below 0V.

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Figure 3.1: Now, since G2’s output has lower potential, the capacitor begins to discharge to it and becomes positively charged. The source current now flows from Q1’s output to Q2’s output as sink current. Current now flows in the opposite direction compared to the previous state. As current flows over the resistor, voltage develops across it, and the voltage at point A begins to rise yet again.

The circuit output is from the same node as G2’s output, which is currently at “0,” or equal to GND.

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Figure 3.2: Again, as the capacitor discharges, its current begins to drop. However, before it came to a standstill, the voltage across would go above the threshold level, which, as we have established, is half the supply voltage. In other words, the voltage at point A rises above ½ VDD. When this happens, G1 switches its logic again, causing G2 to follow right after.

As before, the capacitor would soon switch the polarity of its charge as the current switches direction. After the switch, the voltage at point A abruptly changes to positive, potentially higher than the supply voltage. However, the chip protection shouldn’t let the actual gate input voltage exceed the supply. 

This brings us back to the starting condition of G1’s output = “0” and G2’s output = “1.” The cycle will start over again from here, repeating indefinitely.

As we can see, the multivibrator output switches back and forth between “1” and “0” depending on the current direction and voltage at point A. We could also graph the output voltage relative to the capacitor voltage and the point A voltage, which is shown below.

Voltage Waveforms and Relationships

In the first graph, we can see that the output voltage swings between VDD (“1”) and ground or 0V (“0”). This creates a symmetrical square wave signal. When driving a load, the G2’s output sources current during “1” and sinks current during “0.”

Moving on, next we have the capacitor voltage drop across. The waveform shows the capacitor reversing its charge polarity between each output state. The graph itself resembles a sawtooth wave with slight tapering near the peaks due to the decreasing current as the voltage approaches the switching point.

When the output is “0,” current from G1’s output charges the capacitor positively; thus, its voltage rises. Likewise, when the output is “1,” current from G2’s output charges the capacitor negatively; as a result, its voltage falls.

Note that the capacitor voltage swings by approximately ½ VDD in each direction. This is because the capacitor drop across voltage is related to G1’s input voltage. Once the input reaches the gate’s switching threshold of ½ VDD, G1 changes state, reversing the charging direction. As a result, the capacitor voltage cannot continue increasing in that direction beyond the point required to trigger the gate.

Lastly, we have the point A voltage. It shows an alternating ramp-like triangle wave centered at the threshold level, which is ½ VDD. The voltage jumps abruptly after the state transitions, then gradually decreases nonlinearly. 

Its rise and fall mirror that of the capacitor voltage, which is rising during the “0” output and falling during the “1.” However, it will always vary toward ½ VDD, as that’s what triggers the state change. As the state transitions while the capacitor still has a voltage drop across it, the input node can momentarily rise above the supply or fall below 0V. However, in practice, the input protection diodes clamp these excursions to slightly beyond the supply rails.

Example Basic Astable Multivibrator Circuits

Using what we learned from the theoretical circuit above, let’s now look at a couple of real, practical gate-based astable multivibrator circuits. These circuits fall under the relaxation oscillator category. Note that these circuits are just a basic configuration using different ICs and logic gates.

Basic 1kHz Clock Generator Circuit Using CD4049 NOT Gates

With this RC configuration, this relaxation oscillator can generate a 1kHz square-wave signal. The supply voltage (VDD) is given at 4.5V to 6V. VDD exceeding this range may be possible as long as it’s within the chip supply range; however, it may noticeably shift the frequency.

The IC used is the CD4049 hex inverting buffer gate chip. An equivalent CD4069 should also work. In theory, the unbuffered version of the CD4069 works best for this usage. Note: CD4049 and CD4069 have different pinouts.

Using the frequency formula from before, a resistor value of 680kΩ and a capacitor value of 0.001μF (1nF) should result in approximately a 1.06kHz signal.

$$\frac{1}{2\, \ln(3) \times 680\text{k}\Omega \times 1\text{n}F} \approx 1060\text{Hz}$$

1KHz Oscillator Circuit Using NAND or NOR Gates

Here is another version of the same 1kHz square-wave RC relaxation oscillator configuration using a more popular CD4011BE quad NAND gate chip. The NAND has both of its inputs tied together, creating an equivalent inverter. Like the previous circuit, we use 5V VDD here as well.

Likewise, we can also use a NOR gate from the CD4001BE quad NOR gate chip to construct an equivalent inverter. We’re using the same RC timing, so the result should still be the same. 

1KHz Oscillator Using Schmitt Trigger

We could also use an inverting Schmitt trigger gate to create an astable multivibrator. This relaxation oscillator circuit uses a different frequency formula than the two-inverter version. The IC used is a CD40106 hex Schmitt trigger. However, we’d also tried with 7413 TLL, but it wouldn’t work for us.

The operating principle is similar to the two-gate solution: feedback is provided through an RC network that determines the timing. However, unlike a standard inverter, the inverting Schmitt trigger has two switching thresholds — a lower and an upper level.

The lower threshold is approximately ⅓ VDD, while the upper threshold is roughly ⅔ VDD. As a result, the capacitor charges and discharges between these two levels, which determines the charge and discharge timing. The simplified frequency formula for this circuit is as follows.

$$f=\frac{1}{\ln(3) \, RC}$$

It strictly assumes that the lower and higher thresholds are ⅓ VDD and ⅔ VDD, respectively. According to this formula, with R = 180kΩ and C = 0.01μF (10nF), the output frequency is approximately 506Hz.

However, in practice, this circuit produces a 1.1kHz square-wave signal with a 49% duty cycle at a 5V supply, significantly higher than the 506Hz approximated by the simplified formula. This demonstrates that the actual switching thresholds of the CD40106 at 5V deviate from the ideal ⅓ and ⅔ VDD values, which is the main limitation of these formulas.

Of course, there’s also a more accurate way of determining the frequency. That’s to use the chip’s actual measured upper and lower threshold voltages. However, that would be too complex for these basic circuits. Plus, in practice, we could easily tune the resistor value until we get our desired frequency.

In terms of waveform, the Schmitt trigger version generates a more symmetrical signal compared to the normal inverter gate version. The frequency is marginally higher than the 1kHz target, but it can be adjusted down by changing the resistor. In addition to a more compact circuit—needing only one Schmitt trigger gate—this circuit looks to be an ideal choice.

A Related Circuit: The Ring Oscillator

A ring oscillator is technically not a multivibrator, although it is still an astable digital circuit that continuously switches between logical “0” and “1.” The reason we want to bring it up here is that it looks similar to the astable multivibrator and relies heavily on logic gates in its operation.

A ring oscillator essentially consists of an odd number of inverter gates connected in a feedback loop, which is where the ‘ring’ part of its name comes from. Without additional components, it can generate a square-wave signal at very high frequencies, often in the MHz range. The frequency depends mainly on the propagation delay of each gate.

It’s a simple and interesting solution for producing non-sinusoidal signals. However, it’s outside the scope of this article, so we’ll discuss it in more detail in a separate article.

Check out these related articles, too:

• 4011 Tone Generator circuit projects
• 5 Crystal oscillator Circuits using CMOS
• Simple VCO using Schmitt trigger using 74HC14

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