Often, analog meters read lower than the true value because their internal resistance is too low and loads the circuit. However, we can solve this problem by experimenting with a JFET source follower circuit to increase the meter’s input impedance.

The Problem With an Analog Voltmeter
We experimented with two resistors in series (2.2MΩ) and a 9V battery as the power source, creating a voltage divider circuit.

In principle, the output voltage should be 4.5V, but the analog voltmeter reads only about 0.8V. Why?
Why Is the Output Voltage Lower Than Expected?
Now, let’s use the digital voltmeter to measure the output, as it’s more accurate. We measured the voltage of the 9V battery and got 8.48V. Therefore, the output voltage should be 4.24V.

However, it got 3.82V, which is closer to the expected voltage than the analog voltmeter. This is because the manufacturer of the digital voltmeter states that it has a very high input impedance of up to 10M.
Voltmeter’s Input Impedance (RM)
This resistance between the two probes is called the voltmeter’s input impedance, denoted RM. The analog meter we have been using has 20kΩ/V input impedance. Therefore, 10V measurement range, the input impedance is 200kΩ.
As a result, when the analog voltmeter is connected to the divider output, it effectively forms a parallel resistance with the lower resistor (R2). This changes the voltage divider’s resistance ratio, causing the measured voltage to drop.

Simply put, the voltage shown on the voltmeter isn’t just the voltage across the resistor, but it’s the voltage drop across both the resistor and the voltmeter itself. Therefore, we want RM to be as high as possible. Because the higher the RM is, the lower the load effect and the more accurate the measurement.
JFET Common-Drain (Source-Follower) Circuit
We tested a simple fix by using the JFET common-drain circuit, also known as a source-follower. This is the same concept as the BJT common-collector (emitter-follower), but with one big difference. A JFET is voltage-dependent and draws very little input current.
In contrast to the current-dependent BJT transistor, a JFET is a voltage-dependent device. So, a JFET uses voltage to control the output current, while drawing very little input current. As shown below, the circuit is simple yet remains practical and useful.
The source-follower sits between the subject and the voltmeter. The gate (G) connects to the measurement point, while the voltmeter connects to the output. Because of the JFET’s extremely high input impedance, the loading effect on the subject is minimal.

This makes the source-follower useful as both an impedance buffer and a high-current driver. However, this basic design still lacks proper biasing and adjustment. We will look at the real circuit next.
Simple JFET High-Input Impedance Voltage Buffer for Analog Voltmeters
The circuit consists mainly of the BF256 N-channel JFET and a couple of resistors and potentiometers for output adjustment. The voltmeter used here is the analog multimeter we have been using throughout this article.

The power supply is the same 9V battery used for the voltage divider, with the actual voltage measuring about 8.48V. R1 and R2 form the bias network for the JFET and are used to set the gate voltage.
R3 is the source resistor, which sets the operating current of the transistor and develops the output voltage across it. VR1 is used together with R3 to fine-tune this voltage.
The BF256 is a common JFET often used in RF amplifier circuits. According to the datasheet, the gate leakage current IGSS can be up to about 5nA at a gate voltage of 20V. Using these two values, we can estimate the equivalent input impedance with Ohm’s law:
$$\frac{20V}{5nA} \approx 4\text{G}\Omega$$
This is drastically higher than the 200kΩ input impedance of the analog voltmeter and even higher than the 10MΩ of the digital one. However, note that this is only a rough estimate; the actual number may be lower in reality.
We built this circuit on the same breadboard as the 2.2MΩ symmetrical voltage divider circuit. Then, we connect the input of the source-follower circuit to the output of the voltage divider. The voltmeter is set to the 10V range. The voltmeter reading shows approximately 4.2, as shown in Figure 7.

Conclusion
We tested this JFET buffer as a simple high-impedance voltmeter, and it works. But it is not perfect. We found:
- Low voltages around 1V are tricky due to bias offset
- The zero point is not floating, so the meter shows a small reading even with nothing connected.
Linearity is also not consistent across the range. If we use a CMOS op-amp would do better, but this circuit still clearly shows how JFET’s high input impedance reduces loading effect.
We think there is still room to improve this design, and we plan to improve it in the future.
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Hello. I’m Chayapol, but I could also go by Aot. I write and draw illustrations for ElecCircuit.com.
I usually cover articles related to digital electronics, logic, or basic principles or ideas on the site.