Digital Counter | Electronic Project Circuits

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Simple Digital Counter by 4026

The basic digital circuits are Flip Flop and Counter, both are here. This circuit can be cascaded to make even a 6 digit event counter, even a simple frequency counter can be made.
These are best done with microcontrollers today. Then what if you have to design your own microcontroller on a FPGA, so the basics have to be sound, hence you have to know what gates, flip flops and counters are.
see the seven segment display. Inc, Dec, and Set buttons are momentary acting and Clk Button is latching type. The Dip Switch in the also can be set.
a.Set the DIP Switch as you like and then Press the Set button. The BCD value will be at the 4029 output, The Decimal value will be seen in the seven segment Display. Now try for different dip switch settings and see the BCD and Decimal output.
b.Now Press The Inc and Dec pushbuttons. Set it to Increment up-count or Decrement which is down-count. This is a simple flip flop control.
c.Now Click the Clk – clock or count button, the switch will latch, press it again to release. If you toggle it once the counter will get a single pulse and it will count it, see the BCD and decimal displays. Now you turn it on and leave it, the counter will keep counting one per second till you turn it off, the clock nand gate is wired to be an oscillator.

Read More Source:http://www.electronics-circuits.com/schematics/arc20050918.html
Thank you.

Be the first to comment - What do you think? Posted by admin - February 6, 2008 at 7:45 pm

Categories: Digital Tags: counter circuit, digital circuit, digital counter, IC 4026

single digit voltmeter by IC 4028 LM311

First bear it in mind that it is a single digit voltmeter which is 0-9 counts only on the positive side, that is it can measure +0 to +9V DC +/- 1V error. That may not be practical for the cost of the components above. It may be used as a toy logic probe. The reason for the circuit is not for usage, but to give design ideas. The methodology used is Gut Feel – Thumb Rule method.

First i explain the simple part, D1 a seven segment common cathode LED display is chosen as CD4511 is a sourcing driver. 4511 can be latched so it has been used here, it decodes binary 4 bit decade info to seven segment output. The four bits are derived from CD4029 up-down clock pulse counter. LM311 is a analog comparator with single supply capability which is the A-D interface.

To avoid resistors for each of the LEDs the LEDs are turned ON-OFF at 10KHz 50% duty cycle. The Nand Schmitt Trigger CD4093 is used as in IC4D as a 10KHz Clock which drives T1 transistor with a resistor R5. On turn on IC4D one input is high which is pin 12 pulled up to +5 and another Pin 13 is Low as C4 is in discharged condition in NAND gate both inputs high, gives a low output, the other combinations the output is high. So the output goes high, this starts charging the cap C4 which soon makes both inputs high, which in turn makes output low starting the discharge of C4. This is now evidently a endless loop, hence it is a oscillator. R*C = T …. 0.01uF * 10K = 100uS or 10KHz as F=1/T approx or better still multiply by 1.1 ?. I am not good at formulae but i manage with a calculator.

The supply and ground pins of CMOS chips have not been shown, see datasheet or earlier circuits.

IC4A is also a oscillator but slower which is good enough, it is slow so that a measurement can be made nearly every second. The IC4A slow clock is read by 4029 which produces a count-down binary nibble at Q1….Q4, This is converted to crude analog with R1…R4. The voltage generated is compared with the voltage you are measuring by LM311 which generates a Latch pulse to 4511 to freeze the reading where both voltages match.

Be the first to comment - What do you think? Posted by admin - December 12, 2007 at 8:54 pm

Categories: Digital, Lighting, Meter Tags: counter circuit, digital counter, Volt meter

Variable period Oscillator (CD4017)

The following CD4017 circuits have not been tested and is presented here as a possibility only. If you experiment with this circuit please send me any problems found so that the circuit can be updated.

The following circuits are designed to change the duration of each positive output pulse from the astable timer. The circuits use a CD4017 Decade Counter / Decoder to provide nine or ten steps in the cycle.

The first circuit operates with a repeating ten step cycle. Each output pulse is longer than the previous until a count of ten is reached at which time the cycle will repeat.

The second circuit has a nine step cycle that stops at the end of the cycle. The cycle is restarted or reset when the RESET input is briefly made high.

The CD4017 can be configured to give count lengths between 1 and 10. Refer to the timing diagram in the CD4017 data sheet for a better understanding of the circuit’s operation.

Source:http://home.cogeco.ca/~rpaisley4/LM555.html#21