Frequency doubler with 4069
This frequency doubler using a single 4069 hex inverter IC, a frequency doubler can be constructed to give an output pulse train whose frequency is twice that of a squarewave input signal. The signal is applied to the input of N1. It should be a squarewave with a duty-cycle of approximately 50% at level compatible with CMOS logic (3-15V peak to peak depending on supply voltage). The input signal is buffered and inverted by N1, and inverted again by N2, so the outputs A and B of N1 and N2 are squarewave signals 180° out of phase. The output of N1, is differentiated by C1 and R1 and the output of N2 is differentiated by C2 and R2, giving two spike waveforms of C and D, 180° out of phase. The signals are buffered, inverted and shaped by N3 and N4. These are then combined in a NOR gate consisting of D1, D2, R3 and N5, and finally inverted by N6 to give the frequency twice that of the input signal. The circuit will operate over a wide frequency range. With the component values shown the width of pulses in E and F point is about 500ns, so the duty cycle of the output will be 50% when the frequency is 1MHZ, when the input frequency is 500KHZ.By A.M. Bosschaert
Related Links
More digital circuit
More circuit com
More circuit digital counter
More circuit about IC 4069
More circuit about Pulse Generator
circuit 4013 Modula-8-Counter
circuit 4013 Divide by 2
More circuit about Frequency Divider
More circuit about Oscillator Generator
More circuit about Squarewave Oscillator
Pulse Reading Logic by 74LS00 and 74LS123
Simple Logic Probe by NE556
Output buffer by IC 4050
Read More Source:
http://users.otenet.gr/~athsam/frequency_doubler_with_4069.htm
Thank you.
Related Posts :
The following CD4017 circuits have not been tested and is presented here as a possibility only. If you experiment with this circuit please send me any problems found so that the circuit can be up ...
U1 7555 is a CMOS version of 555 LM555 pdf datasheet. The 555 here is in Astable Oscillator mode, C1 and C4 are decoupling capacitors 0.1uF value, ceramic disc. The output is around 100kHz, ...
This frequency doubler uses one CMOS quad, two input NAND gate package type 4011. The frequency doubler proper consists of an inverter IC1B, two differentiating networks R1/C1, R2/C2 and NAND ...
This circuit is a Logic Probe. It indicates the logic state of the node of any TTL logic circuit. To do that, we have to supply the probe with the same power of the circuit that we want to ana ...
This is a cycle high or low status of the digital logic signal. Since the 5V power supply is ideal for TTL digital And the circuit to clearly display text. Is easy to see the value. Operation ...


or

